LOW-LEVEL DESIGN ENTRY: The purpose of design entry is to describe a microelectronic system to a set of electronic-design automation ( EDA ) tools. Electronic systems used to be, and many still are, constructed from off-the-shelf components, such as TTL ICs. Design entry for these systems now usually consists of drawing a picture, a schematic . The schematic shows how all the components are connected together, the connectivity of an ASIC. This type of design-entry process is called schematic entry , or schematic capture.

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PROGRAMMABLE ASIC LOGIC CELLS: All programmable ASICs or FPGAs contain a basic logic cell replicated in a regular array across the chip (analogous to a base cell in an MGA). There are the following three different types of basic logic cells: (1) multiplexer based, (2) look-up table based, and (3) programmable array logic. The choice among these depends on the programming technology.

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PROGRAMMABLE ASIC INTERCONNECT: All FPGAs contain some type of programmable interconnect . The structure and complexity of the interconnect is largely determined by the programming technology and the architecture of the basic logic cell. The raw material that we have to work with in building the interconnect is aluminum-based metallization, which has a sheet resistance of approximately 50 m W /square and a line capacitance of 0.2 pFcm �1 .

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PROGRAMMABLE ASIC I/O CELLS: All programmable ASICs contain some type of input/output cell ( I/O cell ). These I/O cells handle driving logic signals off-chip, receiving and conditioning external inputs, as well as handling such things as electrostatic protection. This chapter explains the different types of I/O cells that are used in programmable ASICs and their functions.

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TESTING ASICs: ASICs are tested at two stages during manufacture using production tests . First, the silicon die are tested after fabrication is complete at wafer test or wafer sort . Each wafer is tested, one die at a time, using an array of probes on a probe card that descend onto the bonding pads of a single die.

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ASIC LIBRARY : Once we have decided to use an ASIC design style�using predefined and precharacterized cells from a library�we need to design or buy a cell library. Even though it is not necessary a knowledge of ASIC library design makes it easier to use library cells effectively.

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CMOS LOGIC: A CMOS transistor (or device) has four terminals: gate , source , drain , and a fourth terminal that we shall ignore until the next section. A CMOS transistor is a switch. The switch must be conducting or on to allow current to flow between the source and drain terminals (using open and closed for switches is confusing�for the same reason we say a tap is on and not that it is closed ). The transistor source and drain terminals are equivalent as far as digital signals are concerned

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ASICs(Application Specific Integrated Circuits): The semiconductor industry has evolved from the first ICs of the early 1970s and matured rapidly since then. Early small-scale integration ( SSI ) ICs contained a few (1 to 10) logic gates�NAND gates, NOR gates, and so on�amounting to a few tens of transistors. The era of medium-scale integration ( MSI ) increased the range of integrated logic available to counters and similar, larger scale, logic functions. The era of large-scale integration ( LSI ) packed even larger logic functions, such as the first microprocessors, into a single chip.

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How Computers Work: Computers are the most complex machines that have ever been created. Very few people really know how they work. This book will tell you how they work and no technical knowledge is required. It explains the operation of a simple, but fully functional, computer in complete detail.

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PROGRAMMABLE ASIC DESIGN SOFTWARE: There are five components of a programmable ASIC or FPGA: (1) the programming technology, (2) the basic logic cell, (3) the I/O cell, (4) the interconnect, and (5) the design software that allows you to program the ASIC.

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